The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and device for the etching process for the manufacture of integrated circuits. Merely by way of example, the invention has been applied to dual-damascene formation and reduces loading effects that are typically associated with pattern diversity. But it would be recognized that the invention has a much broader range of applicability.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such a limit is chemical dry etching process used for the manufacture of integrated circuits in a cost effective and efficient way.
The manufacturing of integrated circuits involves various processes. For example, the processes include, inter alia, wafer growth, photolithography, doping, oxidation, deposition, etching Removal, and epitaxial growth.
Semiconductor devices and circuits are formed in wafers, which serve as substrates. Generally, single-crystal substrates, which are made from a single material with crystals formed by atoms all aligned in a specific direction. The process of waver creation usually involves creating a large ingot of semiconductor materials, aligning the ingot, removing impurities, slicing ingot into thin wafers, and polishing the sliced wafers.
Generally, photolithography process is used to define and shape specific areas of the wafer to suit particular design of integrated circuit. Usually, a layout design used to create an optical mask (or reticle pattern, depending on application). The wafer surface is usually covered with a layer of photoresist. The wafer is then exposed to light through the optical mask. After light exposure, the areas of photoresist that were exposed to light are removed using chemical process. As a result, the wafer contains both clear areas (where photoresist is removed) and areas blocked by photoresist. Next, various processes (such as etching, oxidation, diffusion, etc.) only affecting clear areas are performed. After various process are finished, photoresist materials are then removed.
Deposition is another process in semiconductor fabrication. Deposition provides connections among insulators and interconnecting layers by depositing various materials. Techniques such as chemical vapor deposition (CVD) and lower pressure CVD (LPCVD) are commonly used. For example, metals are deposited to provide low resistance interconnects, polysillicon is used as conductor, and dielectric materials are deposited to create insulating layers.
Etching is another important process in semiconductor manufacturing. Etching involves removing selected regions from the surface of a wafer using physical process, chemical process, or the combination thereof. Usually the goal of etching is to faithfully reproduce masking patterns. To achieve this goal, it is often desirable to for the etching process to be highly selective both in patterns and depth, which is often achieve through chemical dry etching.
Chemical drying etching usually involves generating reactive species in a plasma, diffusing these species to the surface of material being etched, species being absorbed, reacting of these species on the surface to form volatile by-product, absorbing or the by-product by the surface, and diffusing of the desorbed species diffusing into gas. There are many various dry-etch systems to accomplish these steps. For example, dry-etch systems include barrel etchers, downstream etchers, parallel-electrode (planar) reactor etchers, stacked parallel-electrode etchers, hexode batch etchers, magnetron ion etchers, etc.
Among various types of etching processes, dual damascene etching has been one of the most difficult. Due to the complexity associated with dual damascene, the standard for both etching and striping processes are often strict. For example, the process usually need to avoid copper exposures on via bottoms during etching and subsequent plasma photoresist stripping in order to maintain contact yield. Often, the margin for error is typically very small.
In the past, conventional techniques have been using deep ultraviolet light absorbing oxide (DUO) materials to fill via during the manufacturing process. For example, the DUO material is used in this application as a sacrifice layer. One of the challenge associated with using the DUO material is to reduce or eliminate loading effect caused by pattern diversity. Unfortunately, conventional techniques are often inadequate for many manufacturing needs of semiconductors. For example, DUO material used in conventional techniques often cause too much loading effect. These and other limitations of the conventional techniques have been overcome, at least in part, by the invention that has been fully described below. Therefore, it is desirable to have an improved method and system for the semiconductor manufacturing process.